Logic gates are essential components in digital electronics microelectronic circuits. However, when it comes to printing complex microelectronic circuits, the performance and reliability of printed logic gates can pose challenges for designing innovative applications. To address this issue, we have developed pass logic gates – including AND, OR, and XNOR gates – using electrolyte-gated field-effect transistors with an indium oxide channel. Our research has shown that these printed pass logic gates significantly reduce propagation delay time compared to traditional designs. Moreover, they require fewer transistors, leading to a more efficient circuit. By utilizing pass logic gate designs, we can improve the reliability and performance of microelectronic circuits in the realm of printed electronics.

Dr. Gabriel Cadilha Marques is a group leader (Printed Devices and Circiuts) at the KIT, Institute of Nanotechnology. He received his PhD from the KIT. The M.Eng. degree in electronic and mechatronic systems and the B.Eng. degree in electrical engineering he received from the Technische Hochschule Nürnberg Georg Simon Ohm, Nürnberg, Germany, in 2014 and 2012, respectively. He authored more than 40 peer-reviewed papers.